CPU Verification Engineer (RISC-V)
Qualcomm · Santa Clara
Full-time Posted 4 days ago
About this role
## Company: Qualcomm Technologies, Inc. ## Job Area: Engineering Group, Engineering Group > CPU Engineering General Summary: As a Design Verification Engineer, you will work with Chip Architects to validate the concepts of CPU and SOC level micro-architectures. You will work on a selected part of the CPU Design Verification to ensure that it functions to the standards of being launch ready for the end Product
Role and Responsibilities * Work with CPU and SOC Architects to understand the concepts and high-level system requirements. * Develop detailed Test and Coverage plans based on the Architecture and Micro-architecture. * Develop Verification Methodology, ensuring scalability and portability across environments
* Develop Verification environment, including all the respective components such as Stimulus, Checkers, Assertions, Trackers, and Coverage. * Develop Verification Plans and Testbenches for your functional domain. * Execute Verification Plans, including Design Bring-up, DV environment Bring-up, Regressions enabling all features under your care, and Debug of the test failures
* Track and report DV progress using a variety of metrics, including Bugs and Coverage. Preferred Qualifications * ### Extensive knowledge of industry Instruction Set Architectures, particularly RISC-V * Deep knowledge of Micro-Processor Verification functions and Architectures, in domains such as: Cache Coherence, Memory ordering and Consistency, Prefetching, Branch Prediction, Renaming, Speculative execution, and Address Translation/Memory Management. * Knowledge of Random Instruction Sequencing (RIS) and testing a given design, at the Block/Unit-level and Subsystem/Chip-level for proving correctness
* Experience in leading a small team of Verification engineers performing CPU Verification. * Advance techniques such as: Formal, Assertions, and Silicon bringup, is helpful. * In-depth knowledge of Micro-processor functions, Architectures, and
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